Andrés Felipe Amaya Beltrán
Biography


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Analog and Mixed-Signal circuit designer with experience on the design of TX-RX blocks for high-speed serial interfaces (DFE, CDR, and CTLE circuits) including chip-scope onchip technique for link training and monitoring. Moreover, I have experience in linear voltage regulator and voltage reference design for SoC, and general-purpose circuits such as OpAmps, OTAs and comparators. Solid VLSI background, and knowledge about design techniques for state-of-art CMOS nodes and mitigation of PVT variations on the performance. Also, I have been involved in the design of development boards for IoT applications, especially with power distribution networks and signal conditioning. Furthermore, I have experience with the wire-bonding process for chip-on-board applications.


Research interests:

High-speed signal interfaces, PVT robust circuits, offset correction circuits, and data converters.

Email:
andres.amaya.beltran@gmail.com

Linkedln:
https://www.linkedin.com/in/afamaya/

Google Scholar:
https://scholar.google.com/citations?hl=en&user=bZl1NU4AAAAJ