Andrés Felipe Amaya Beltrán - Ph.D. Student


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Andres Amaya received his bachelor degree in electronic engineering from the Universidad Industrial de Santander (UIS), in 2010, and his MSc degree in electronics engineering from the Instituto Nacional de Astrofísica, Óptica y Electrónica, in 2012. Since 2012, he has been working at UIS as Adjunct Professor. As part of his duties, he participated in the Iberoamerican analog IC design contest Silterra-Istec, awarding the second place. Also, He has three different patent requests regarding PVT robust circuits and offset correction. He started his Ph.D. in 2013 and by 2015 he joined the Integrated Systems Research Group - Onchip at UIS, to continue his research on high-speed signal interfaces and PVT robust circuits.

Research interests:

High-speed signal interfaces, PVT robust circuits, offset correction circuits, and data converters.